1. Field of the Invention
This invention relates to the manufacture of integrated circuit devices, and in particular, to a process of using interconnect leads for electrically connecting an integrated circuit on a semiconductor chip to a lead frame or substrate.
2. Description of the Related Art
An integrated circuit on a semiconductor chip must be electrically connected to external circuitry. A common way of doing this is to provide bond pads on the surface of the semiconductor chip which are electrically connected to the rest of the integrated circuit. Bonding wires may be used to connect the integrated circuit to the external circuitry by bonding one end of a bonding wire to a bond pad and the other end of the bonding wire to a lead of a lead frame or to circuitry on a substrate such as a circuit board.
Alternatively, the prior art process known as the "tab" (tape automated bonding) system may be used to connect an integrated circuit electrically to the leads of a lead frame, or to a circuit board, by using metallic interconnect leads affixed to a film made of kapton, mylar (trademarked names for 2 Dupont products) or other similar substance. Typically, the interconnect leads are affixed to the film using an epoxy or polyester adhesive. With the tab system, the integrated circuit bond pads each have a plated bump on their surface to which is bonded one end of an interconnect lead. The plated bumps keep the interconnect leads from touching the rest of the integrated circuit. After the interconnect leads are bonded to the bond pads, the other end of each interconnect lead is bonded to one of the leadframe leads or to the circuit board. The film keeps the interconnect leads in the proper position for bonding during both bonding steps. Following bonding, the leadframe or circuit board is then packaged or encapsulated along with the portion of the film adhering to the interconnect leads.
A disadvantage of the tab system is that the film enclosed within the integrated circuit package introduces unnecessary foreign material within the package. In all semiconductor packaging it is highly desirable to eliminate or at least minimize all extraneous materials other than the semiconductor chip and interconnect leads from the package. This requirement is imposed to keep materials out of the package which are prone to adsorb moisture or introduce foreign contaminants, both which adversely affect reliability.